Handbook of European HPC projects

Mont-Blanc 3

European scalable and power efficient HPC platform based on low-power embedded technology

Project Mont-Blanc is now in its third phase. All phases of the Mont-Blanc project share the vision of developing a European Exascale approach leveraging commodity power-and cost-efficient embedded technologies.

 The key outcome of the project is the deployment of Arm-based computing platforms enabling Arm architecture in HPC, which boost system software development and allow to test real scientific applications at scale.

 Based on the experience gained from the development of various platforms since 2011 and implementing a co-design approach, the Mont-Blanc project now aims to define the architecture of an Exascale-class compute node based on the Arm architecture, and capable of being manufactured at industrial scale.

Our top achievements

  1. Demonstrating that it is possible to run HPC workloads with European embedded technology
  2. Contributing to the design of a next-generation exascale-class machine with a co-design approach
  3. Testing and scaling REAL scientific applications on a non-conventional HPC architecture

PROJECT’S CONTACT:

Etienne Walter

Call:
FETHPC-1-2014

Coordinating Organization:
Atos (Bull SAS), France

Project Timespan
2015-10-01 – 2018-12-31

Other Partners:
  • Arm Ltd, United Kingdom
  • AVL LIST GmbH, Austria
  • BSC – Barcelona Supercomputing Center, Spain
  • CNRS – Centre National de la Recherche Scientifique, France
  • ETHZ – Eidgenössische Technische Hochschule Zürich, Switzerland
  • HLRS – High Performance Computing Center – Universität Stuttgart, Germany
  • Universidad de Cantabria, Spain
  • Universität Graz, Austria
  • Université de Versailles Saint Quentin, France